https://dmitry.gr/?r=06.%20Thoughts&proj=12.%20RV
A beautiful long text on why RISV-V is a failure. On a related note, XMPP failed for exact same reasons.
@nprofile1q...
>This makes writing any sort of a generic kernel very difficult -- you literally have no idea what to expect.
aarch64 is similar in this regard when it comes to bootstrap. At some point the CPU reset vector was implementation defined. Where does the CPU go when reset is deasserted? Who the fuck know, read the datatsheet for the core. Then the new spec switched to two options, which of course a vendor can choose which. So now you at least have to options where a CPU might start executing instructions.
Meanwhile look at x86 and the thing did not change at all since the i386 and in some regards even before that. The reset vector is fixed, the same since the 386. Timers and other low-level peripherals, still the same. It still boots in dumb real mode, just like 8086. The system bootstrap and handoff to bootloader/kernel is almost written in stone.
>This makes writing any sort of a generic kernel very difficult -- you literally have no idea what to expect.
aarch64 is similar in this regard when it comes to bootstrap. At some point the CPU reset vector was implementation defined. Where does the CPU go when reset is deasserted? Who the fuck know, read the datatsheet for the core. Then the new spec switched to two options, which of course a vendor can choose which. So now you at least have to options where a CPU might start executing instructions.
Meanwhile look at x86 and the thing did not change at all since the i386 and in some regards even before that. The reset vector is fixed, the same since the 386. Timers and other low-level peripherals, still the same. It still boots in dumb real mode, just like 8086. The system bootstrap and handoff to bootloader/kernel is almost written in stone.
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